Is chip development


If so, now is the time to relax and
let the right tools work for you.

Specador Documentation Generator

Specador analyzes chip design and verification source code and automatically generates accurate and well organized HTML documentation, including text, diagrams, and hyperlinks.

Ensures that documentation always remains synchronized with source code

Analyzes language constructs to gather relationship and structural information

Generates diagrams for schematics, state machines, TLM port connections, and registers

Produces meaningful documentation even from poorly commented source code

Provides user knobs to customize documentation format and content

Supports Verilog, SystemVerilog, Verilog-AMS, VHDL, and e Language source code

“The human experience was tremendously refreshing. No ‘it’s-a-free-evaluation-but-let’s-have-your-credit-card-details-anyway’ nonsense. Not so much as a ‘how-likely-are-you-to-buy-a-lorry-load?’ Just a simple, ‘here-it-is; hope-you-like-it; call-us-if-you-need-help.’ I warmly recommend AMIQ to anyone in the business of creating, verifying or trying to understand a design.”

Andrew Betts

Consultant, Trainer and Coach


AMIQ EDA provides tools – DVT Eclipse IDE, DVT IDE for Visual Studio Code, DVT Debugger Add-On, Verissimo Linter, and Specador Documentation Generator – that enable design and verification engineers to increase the speed and quality of new code development, simplify legacy code maintenance, accelerate language and methodology learning, improve source code reliability, and automate user documentation. The result is better design and verification code, developed faster and with fewer resources, in a shorter time to market.

Working with 150+ companies in 30+ countries, we are recognized for our high quality products and customer responsiveness.

Start Improving Your Productivity